Field of the Invention
The present invention relates to a thin film transistor array and an image display device.
Discussion of the Background
In recent years, considering achieving flexibility, light weight and low cost, research for a thin film transistor using an organic semiconductor which is capable of being manufactured by a printing method has been actively conducted. It is expected that the research into thin film transistor will be applied to a drive circuit of an organic EL, an electronic paper or the like, or an electronic tag.
The thin film transistor is produced by laminating a conductor, an insulator and a semiconductor or the like. Regarding a thin film transistor array, an interlayer insulation film is provided depending on a structure and a usage thereof, and an upper conductor and a lower conductor are electrically connected via holes disposed in the interlayer insulation film.
To form the interlayer insulation film, the following method is widely used. An inorganic film made of a silicon nitride or a silicon oxide is formed by plasma CVD and a desired opening portion is formed using a photo resist, and then via holes are formed by dry etching. A photo sensitive resin can also be used to form this film. According to these methods, since photolithography is used to form via holes, there is a concern for the productivity and the manufacturing cost, when comparing with an attempt for manufacturing a thin film transistor array by a printing method which aims at cost reduction.
Meanwhile, PTL1 describes a method of forming an interlayer insulation film by using a printing method. In this method, after forming a gate insulation film, a solvent is applied to a portion where via holes will be formed with an ink jet method to dissolve the insulation film, thereby forming via holes. By using an ink jet method, a liquid-repellent ink is coated on a conductor surface exposed in the via hole portion so as to obtain liquid-repellent properties. Subsequently, a precursor resin is printed on the entire surface of the substrate with an ink jet method, followed by curing so as to form the interlayer insulation film.
According to the method described in PTL2, after forming a gate insulation film, a solvent is applied to a portion where via holes will be formed with an ink jet method to dissolve the insulation film, thereby forming via holes. Since the area of a conductor exposed in the via hole portion is smaller than the opening portion, by using an ink jet method, a liquid-repellent ink is coated on a surface of the conductor so as to obtain liquid-repellent properties. Then, a precursor resin is printed on the entire surface of the substrate with an ink jet method, followed by curing so as to form the interlayer insulation film.    PTL 1: JP-A-2012-064844    PTL 2: JP-A-2012-204657